RetiMesh/node latest release …
Heltec SX126x ESP32-S3 Verified on hardware

Heltec WiFi LoRa 32 V3

0.96" 128x64 OLED on the switched Vext rail, SX1262 with a TCXO, 8 MB flash and no PSRAM, no SD slot and no GNSS. Very common hardware. A CP2102 bridge rather than the S3's native USB, so it appears as /dev/ttyUSB* and not as an Espressif JTAG device — and every CP2102 reports the serial number 0001, so with more than one attached /dev/serial/by-id/ names only one of them and the rest have to be found by path. The serial port also carries PPP: pppd on the host makes the node a network interface at 10.65.<n>.1 (docs/local-link.md), and being an S3 it can be put into its downloader over that link. Uses an 8 MB partition table: the stock one maps only the first 4 MB, and with no SD card the filesystem is the only storage the transport store has.

Heltec WiFi LoRa 32 V3
Photo © Heltec Automation

01 Hardware

VendorHeltec
PlatformIO envheltec-v3
Board headersrc/boards/heltec_v3.h
MCUESP32-S3: 8 MB flash, no PSRAM
Chip familyESP32-S3
RadioSX1262 (TCXO, DIO2 drives the RF switch)
Display0.96" SSD1306 on the switched Vext rail
ExtrasPPP over the CP2102 bridge (no SD, no GNSS)
Host linksWi-Fi access point + station · CP2102 serial bridge · PPP over that bridge
Flashingesptool can reset the chip through this port

02 Radio

TransceiverSemtech SX1262
Radio familySX126x
As the registry states itSX1262 (TCXO, DIO2 drives the RF switch)
TCXO1.8 V reference
DIO2 drives the RF switchyes
Default channel869.525 MHz · BW 125 kHz · SF8 · CR 4/5 · 7 dBm
inherited from Config.h
SPI busFSPI

Every node on a channel must agree on frequency, bandwidth, spreading factor, coding rate and sync word. These are the defaults this build ships with; they are changed live on the node's settings page, which prints the matching RNodeInterface block.

03 Pin map

Read straight out of src/boards/heltec_v3.h — every peripheral the firmware drives on this board, and the GPIO it drives it on. A harness diagram, not a picture of where the parts sit.

Pin map heltec-v3 · 3 peripherals
ESP32-S3 8 MB flash no PSRAM Radio SPI SCK 9 MISO 11 MOSI 10 CS 8 RST 12 BUSY 13 DIO1 14 OLED panel I²C SDA 17 SCL 18 RST 21 Vext 36 Controls & indicators GPIO BTN 0 LED 35
Every pin as a table, with the define it comes from
PeripheralSignalGPIODefineNote
RadioSCKGPIO 9PIN_LORA_SCK
MISOGPIO 11PIN_LORA_MISO
MOSIGPIO 10PIN_LORA_MOSI
CSGPIO 8PIN_LORA_CS
RSTGPIO 12PIN_LORA_RST
BUSYGPIO 13PIN_LORA_BUSY
DIO1GPIO 14PIN_LORA_DIO1
OLED panelSDAGPIO 17PIN_OLED_SDA
SCLGPIO 18PIN_OLED_SCL
RSTGPIO 21PIN_OLED_RST
VextGPIO 36PIN_DISPLAY_VEXT
Controls & indicatorsBTNGPIO 0PIN_BUTTON
LEDGPIO 35PIN_STATUS_LED

04 Firmware support

What this build actually drives on this board. Where a part is fitted but left alone, the firmware's own reason is quoted underneath rather than summarised.

CapabilityStateDetail
Reticulum transportdrivenPath table, announce propagation, hop-by-hop forwarding
Wi-Fi AP + captive portaldrivenStatus page, neighbours, bulletin board, settings
TCP 4242 + AutoInterfacedrivenStock RNS clients, zero-config discovery
LoRa radiodrivenSemtech SX1262
Radio self-test at bootdrivenProves the IRQ line on first boot
Prove the interrupt line on the first boot. Two sources agreeing is better than one, but neither is this board on this bench
RF front endnoDriven before the radio can hear anything
External PAno—
DisplaydrivenOLED · 128×64
Backlight controlno—
Touch layerno—
KeyboardnoOn its own microcontroller, over I²C
Trackballno—
microSDnoReticulum store moves onto the card when one is present
GNSSno—
Real-time clocknoSeeds the system clock at boot
Power management ICno—
Battery gaugenot driven—
The board reads its cell on GPIO 1, but only while GPIO 37 holds the divider enabled — and nothing here drives that yet. A divider read without its control line returns a plausible number that is not the battery, which is a worse failure than reporting no battery at all. Left off until it can be checked against a cell, as on the Wireless Stick
IMUno—
Magnetometerno—
Environment sensorno—
Sounderno—
USB networking (CDC-NCM)noThe node is an Ethernet link with DHCP over the cable
PPP over the serial bridgedrivenBridge: CP2102

05 Bench notes

Status as the registry records it boards.json

verified on hardware; PPP built, not yet run on this board.

06 Install

Browser

Pick Heltec WiFi LoRa 32 V3 in the web flasher and click Install. Desktop Chrome or Edge, over HTTPS.

Terminal

pipx run --spec "git+https://github.com/dobrevit/RetiMesh_Node#subdirectory=tools/retimesh-flash" \
  retimesh-flash install --board heltec-v3

From source

pio run -e heltec-v3
pio run -e heltec-v3 -t upload
pio run -e heltec-v3 -t uploadfs